(unknown charset) Re: AMBER: Implicit precision in sander vs architecture

From: (unknown charset) Amber Administration <amber-admin.scripps.edu>
Date: Mon, 20 Oct 2003 16:18:02 -0700

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Date: Fri, 17 Oct 2003 09:17:08 -0700 (PDT)
From: Surjit Dixit <sdixit.wesleyan.edu>
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Organization: Wesleyan University
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Subject: Re: AMBER: Implicit precision in sander vs architecture
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Have you looked into the type of RAM on these 32 bit machines (PC's)? I
have noticed differences between simulations being run on PC's with ECC
(Error Checking and Correcting) and non-ECC RAM.
The trajectories run on machine with nonECC RAM tend to be unstable and
prone to such problems.
Surjit


Teletchéa Stéphane wrote:
> I have recently seen in my dynamics simulations 'vlimit exceeded' on my
> dual xeon although when using the same restart the calculation runs fine
> on a power4 IBM.
>
> I know that implicit double precision is used in fortran code, but i
> have no idea of what it means when the calculations are made on 32-bits
> systems (pentium/athlon) or on 64-bits systems (power4, mips, ...).
>
> I'm a little bit afraid since i have the impression that these errors
> only appear on 32-bits machines. Are roundoff more important there ?
>
> Can someone detail the implecit precision each architecture involves for
> floating point operations ?
>
> Are 32-bits machines 2 times less precise than 64-bits machines ?
>
> I know that after a certain point (as precised by Dr. R. Duke) dynamics
> do diverge 'naturally' because of roundoff but does it happen more
> rapidly on 32-bits systems as i'm suspecting it form a lower precision ?
>
> Any hint would be very helpfull.
>
> Stéphane Teletchéa
>
> Writing his PhD ...
> --


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Received on Tue Oct 21 2003 - 00:53:01 PDT
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